Overview of nonpareil source
Khanh-Dang NGUYEN THU LAM
kdntl at yahoo.fr
Mon Jan 19 05:40:11 PST 2009
I started implementing HPIL emulation for HP41 using nonpareil. By now,
I implemented a chip emulation, with the helios.c file as a model. I
can successfully load the HPIL and Extended IO roms (files are hpil.mod
and ext-io.mod) in nonpareil. When I run some of their commands (such
as SELECT, OUTXB, etc), I could see them read and write the HPIL
registers, as expected. Thus, we can consider that the HPIL interface
with the simulator is done.
Of course, it lacks a emulation of sending and receiving packets from a
loop (real or emulated). I'd like to write some code to start a new
thread, which task would be to send and receive packets. That is, the
emulated HPIL chip would run in the same thread as the main CPU. Its
task is to interpret the HPIL=C and SELPRT opcodes. It would also tell
to another thread "please inject the following byte in the loop"; that
another thread could answer asynchronously "I got the following byte
from the loop".
I read the source code, but a lot of things are still quite unclear.
There are lots of callbacks everywhere and many abstraction levels.
Well, not that many, I guess, but too many for me to have a clear
picture of what is really happening in the program.
Thus, I have two requests.
- I'd like the emulated HPIL chip code to be able to receive
asynchronous messages from another thread. Is it easy to implement in
the current code? What is the best way for doing it?
- Is there, somewhere, a global picture of the different abstraction
level of nonpareil? I mean, something like a functional diagram with
boxes, arrows between boxes, etc. I guess it would help a lot.
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